45#ifndef __INCLUDE_NUTTX_VIDEO_EDID_H
46#define __INCLUDE_NUTTX_VIDEO_EDID_H
53#include <nuttx/video/videomode.h>
59#define EDID_LENGTH 128
65#define EDID_HEADER_MAGIC_OFFSET 0
66#define EDID_HEADER_MAGIC_SIZE 8
70#define EDID_VENDOR_MANUFACTURER_OFFSET 8
71#define EDID_VENDOR_MANUFACTURER_SIZE 2
73#define EDID_VENDOR_PRODUCTCODE_OFFSET 10
74#define EDID_VENDOR_PRODUCTCODE_SIZE 2
76#define EDID_VENDOR_SERIALNO_OFFSET 12
77#define EDID_VENDOR_SERIALNO_SIZE 4
79#define EDID_VENDOR_WEEK_OFFSET 16
80#define EDID_VENDOR_YEAR_OFFSET 17
84#define EDID_VERSION_MAJOR_OFFSET 18
85#define EDID_VERSION_MINOR_OFFSET 19
89#define EDID_DISPLAY_INPUT_OFFSET 20
90#define EDID_DISPLAY_HSIZE_OFFSET 21
91#define EDID_DISPLAY_VSIZE_OFFSET 22
92#define EDID_DISPLAY_GAMMA_OFFSET 23
93#define EDID_DISPLAY_FEATURES_OFFSET 24
97#define EDID_CHROMA_RG_LOW_OFFSET 25
98#define EDID_CHROMA_BW_LOW_OFFSET 26
99#define EDID_CHROMA_REDX_OFFSET 27
100#define EDID_CHROMA_REDY_OFFSET 28
101#define EDID_CHROMA_GREENX_OFFSET 29
102#define EDID_CHROMA_GREENY_OFFSET 30
103#define EDID_CHROMA_BLUEX_OFFSET 31
104#define EDID_CHROMA_BLUEY_OFFSET 32
105#define EDID_CHROMA_WHITEX_OFFSET 33
106#define EDID_CHROMA_WHITEY_OFFSET 34
110#define EDID_TIMING_OFFSET_1 35
111#define EDID_TIMING_OFFSET_2 36
112#define EDID_TIMING_OFFSET_3 37
116#define EDID_STDTIMING_OFFSET 38
117#define EDID_STDTIMING_OFFSET_1 38
118#define EDID_STDTIMING_OFFSET_2 40
119#define EDID_STDTIMING_OFFSET_3 42
120#define EDID_STDTIMING_OFFSET_4 44
121#define EDID_STDTIMING_OFFSET_5 45
122#define EDID_STDTIMING_OFFSET_6 48
123#define EDID_STDTIMING_OFFSET_7 50
124#define EDID_STDTIMING_OFFSET_8 52
126#define EDID_STDTIMING_NUMBER 8
127#define EDID_STDTIMING_SIZE 2
131#define EDID_DESCRIPTOR_OFFSET 54
132#define EDID_DESCRIPTOR_OFFSET_1 54
133#define EDID_DESCRIPTOR_OFFSET_2 72
134#define EDID_DESCRIPTOR_OFFSET_3 90
135#define EDID_DESCRIPTOR_OFFSET_4 108
137#define EDID_DESCRIPTOR_NUMBER 4
138#define EDID_DESCRIPTOR_SIZE 18
142#define EDID_TRAILER_NEXTENSIONS_OFFSET 126
143#define EDID_TRAILER_CHECKSUM_OFFSET 127
147#define EDID_MAGIC {0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0}
151#define EDID_VENDOR_MANUFACTURER_1(n) ((((n) >> 10) & 0x1f) + '@')
152#define EDID_VENDOR_MANUFACTURER_2(n) ((((n) >> 5) & 0x1f) + '@')
153#define EDID_VENDOR_MANUFACTURER_3(n) ((((n) >> 0) & 0x1f) + '@')
159#define BIT_DEPTH_10 3
160#define BIT_DEPTH_12 4
161#define BIT_DEPTH_14 5
162#define BIT_DEPTH_16 6
164#define VIDEO_INTF_HDMIA 1
165#define VIDEO_INTF_HDMIB 2
166#define VIDEO_INTF_MDDI 4
167#define VIDEO_INTF_DISPLAYPORT 5
169#define EDID_DISPLAY_INPUT_DIGITAL (1 << 7)
172#define EDID_DISPLAY_INPUT_VIDIF_SHIFT (0)
173#define EDID_DISPLAY_INPUT_VIDIF_MASK (15 << EDID_DISPLAY_INPUT_VIDIF_SHIFT)
174# define EDID_DISPLAY_INPUT_DFP1_COMPAT (1 << EDID_DISPLAY_INPUT_VIDIF_SHIFT)
175#define EDID_DISPLAY_INPUT_BITDEPTH_SHIFT (4)
176#define EDID_DISPLAY_INPUT_BITDEPTH_MASK (7 << EDID_DISPLAY_INPUT_BITDEPTH_SHIFT)
179#define EDID_DISPLAY_INPUT_VSERRATED (1 << 0)
182#define EDID_DISPLAY_INPUT_GREEN (1 << 1)
183#define EDID_DISPLAY_INPUT_COMPOSITE (1 << 2)
185#define EDID_DISPLAY_INPUT_SYNC (1 << 3)
186#define EDID_DISPLAY_INPUT_BLANK2BLACK (1 << 4)
187#define EDID_DISPLAY_INPUT_LEVELS_SHIFT (5)
189#define EDID_DISPLAY_INPUT_LEVELS_MASK (3 << EDID_DISPLAY_INPUT_LEVELS_SHIFT)
190# define EDID_DISPLAY_INPUT_LEVEL_1 (0 << EDID_DISPLAY_INPUT_LEVELS_SHIFT)
191# define EDID_DISPLAY_INPUT_LEVEL_2 (1 << EDID_DISPLAY_INPUT_LEVELS_SHIFT)
192# define EDID_DISPLAY_INPUT_LEVEL_3 (2 << EDID_DISPLAY_INPUT_LEVELS_SHIFT)
193# define EDID_DISPLAY_INPUT_LEVEL_4 (3 << EDID_DISPLAY_INPUT_LEVELS_SHIFT)
197#define ANALOG_DISPLAY_TYPE_MONOCHOME 0
198#define ANALOG_DISPLAY_TYPE_RGB 1
199#define ANALOG_DISPLAY_TYPE_NONRGB 2
201#define DIGITAL_DISPLAY_TYPE_RGB444 0
202#define DIGITAL_DISPLAY_TYPE_RGBYCRCB_1 1
203#define DIGITAL_DISPLAY_TYPE_RGBYCRCB_2 2
204#define DIGITAL_DISPLAY_TYPE_RGBYCRCB_3 3
206#define EDID_DISPLAY_FEATURE_CONTINUOUS (1 << 0)
208#define EDID_DISPLAY_FEATURE_MODE (1 << 1)
210#define EDID_DISPLAY_FEATURE_STDRGB (1 << 2)
211#define EDID_DISPLAY_FEATURE_ATYPE_SHIFT (3)
212#define EDID_DISPLAY_FEATURE_ATYPE_MASK (3 << EDID_DISPLAY_FEATURE_ATYPE_SHIFT)
213#define EDID_DISPLAY_FEATURE_DTYPE_SHIFT (3)
214#define EDID_DISPLAY_FEATURE_DTYPE_MASK (3 << EDID_DISPLAY_FEATURE_DTYPE_SHIFT)
215# define EDID_ISPLAY_FEATURES_DTYPE_MONO (0 << EDID_DISPLAY_FEATURE_DTYPE_SHIFT)
216# define EDID_ISPLAY_FEATURES_DTYPE_RGB (1 << EDID_DISPLAY_FEATURE_DTYPE_SHIFT)
217# define EDID_ISPLAY_FEATURES_DTYPE_NON_RGB (2 << EDID_DISPLAY_FEATURE_DTYPE_SHIFT)
218# define EDID_ISPLAY_FEATURES_DTYPE_UNDEFINED (3 << EDID_DISPLAY_FEATURE_DTYPE_SHIFT)
219#define EDID_DISPLAY_FEATURE_DPMSOFF (1 << 5)
220#define EDID_DISPLAY_FEATURE_DPMSSUSP (1 << 6)
221#define EDID_DISPLAY_FEATURE_DPMSSTDBY (1 << 7)
225#define EDID_CHROMA_RG_LOW_GREEN_Y_SHIFT (0)
226#define EDID_CHROMA_RG_LOW_GREEN_Y_MASK (3 << EDID_CHROMA_RG_LOW_GREEN_Y_SHIFT)
227#define EDID_CHROMA_RG_LOW_GREEN_X_SHIFT (2)
228#define EDID_CHROMA_RG_LOW_GREEN_X_MASK (3 << EDID_CHROMA_RG_LOW_GREEN_X_SHIFT)
229#define EDID_CHROMA_RG_LOW_RED_Y_SHIFT (4)
230#define EDID_CHROMA_RG_LOW_RED_Y_MASK (3 << EDID_CHROMA_RG_LOW_RED_Y_SHIFT)
231#define EDID_CHROMA_RG_LOW_RED_X_SHIFT (6)
232#define EDID_CHROMA_RG_LOW_RED_X_MASK (3 << EDID_CHROMA_RG_LOW_RED_X_SHIFT)
234#define EDID_CHROMA_BW_LOW_WHITE_Y_SHIFT (0)
235#define EDID_CHROMA_BW_LOW_WHITE_Y_MASK (3 << EDID_CHROMA_BW_LOW_WHITE_Y_SHIFT)
236#define EDID_CHROMA_BW_LOW_WHITE_X_SHIFT (2)
237#define EDID_CHROMA_BW_LOW_WHITE_X_MASK (3 << EDID_CHROMA_BW_LOW_WHITE_X_SHIFT)
238#define EDID_CHROMA_BW_LOW_BLUE_Y_SHIFT (4)
239#define EDID_CHROMA_BW_LOW_BLUE_Y_MASK (3 << EDID_CHROMA_BW_LOW_BLUE_Y_SHIFT)
240#define EDID_CHROMA_BW_LOW_BLUE_X_SHIFT (6)
241#define EDID_CHROMA_BW_LOW_BLUE_X_MASK (3 << EDID_CHROMA_RG_LOW_RED_X_SHIFT)
243#define _CHLO(b,s) (((b) >> (s)) & 0x3)
244#define _CHHI(b) ((b) << 2)
245#define _CHHILO(p,l,s,h) (_CHLO((p)[l], s) | _CHHI((p)[h]))
246#define _CHROMA(p,l,s,h) ((_CHHILO(p,l,s,h) * 1000) / 1024)
248#define EDID_CHROMA_RED_X(p) \
249 (_CHROMA(p, EDID_CHROMA_RG_LOW_OFFSET, EDID_CHROMA_RG_LOW_RED_X_SHIFT, \
250 EDID_CHROMA_REDX_OFFSET))
251#define EDID_CHROMA_RED_Y(p) \
252 (_CHROMA(p, EDID_CHROMA_RG_LOW_OFFSET, EDID_CHROMA_RG_LOW_RED_Y_SHIFT, \
253 EDID_CHROMA_REDY_OFFSET))
254#define EDID_CHROMA_GREEN_X(p) \
255 (_CHROMA(p, EDID_CHROMA_RG_LOW_OFFSET, EDID_CHROMA_RG_LOW_GREEN_X_SHIFT, \
256 EDID_CHROMA_GREENX_OFFSET))
257#define EDID_CHROMA_GREEN_Y(p) \
258 (_CHROMA(p, EDID_CHROMA_RG_LOW_OFFSET, EDID_CHROMA_RG_LOW_GREEN_Y_SHIFT, \
259 EDID_CHROMA_GREENY_OFFSET))
260#define EDID_CHROMA_BLUE_X(p) \
261 (_CHROMA(p, EDID_CHROMA_BW_LOW_OFFSET, EDID_CHROMA_BW_LOW_BLUE_X_SHIFT, \
262 EDID_CHROMA_BLUEX_OFFSET))
263#define EDID_CHROMA_BLUE_Y(p) \
264 (_CHROMA(p, EDID_CHROMA_BW_LOW_OFFSET, EDID_CHROMA_BW_LOW_BLUE_Y_SHIFT, \
265 EDID_CHROMA_BLUEY_OFFSET))
266#define EDID_CHROMA_WHITE_X(p) \
267 (_CHROMA(p, EDID_CHROMA_BW_LOW_OFFSET, EDID_CHROMA_BW_LOW_WHITE_X_SHIFT, \
268 EDID_CHROMA_WHITEX_OFFSET))
269#define EDID_CHROMA_WHITE_Y(p) \
270 (_CHROMA(p, EDID_CHROMA_BW_LOW_OFFSET, EDID_CHROMA_BW_LOW_WHITE_Y_SHIFT, \
271 EDID_CHROMA_WHITEY_OFFSET))
275#define EDID_TIMING_1_800x600_60Hz (1 << 0)
276#define EDID_TIMING_1_800x600_56Hz (1 << 1)
277#define EDID_TIMING_1_640x600_75Hz (1 << 2)
278#define EDID_TIMING_1_640x480_72Hz (1 << 3)
279#define EDID_TIMING_1_640x480_67Hz (1 << 4)
280#define EDID_TIMING_1_640x480_60Hz (1 << 5)
281#define EDID_TIMING_1_720x400_88Hz (1 << 6)
282#define EDID_TIMING_1_720x400_70Hz (1 << 7)
284#define EDID_TIMING_2_1280x1024_75Hz (1 << 0)
285#define EDID_TIMING_2_1024x768_75Hz (1 << 1)
286#define EDID_TIMING_2_1024x768_70Hz (1 << 2)
287#define EDID_TIMING_2_1024x768_60Hz (1 << 3)
288#define EDID_TIMING_2_1024x768_87Hz (1 << 4)
289#define EDID_TIMING_2_832x624_75Hz (1 << 5)
290#define EDID_TIMING_2_800x600_75Hz (1 << 6)
291#define EDID_TIMING_2_800x600_72Hz (1 << 7)
293#define EDID_TIMING_3_VENDOR_SHIFT (0)
294#define EDID_TIMING_3_VENDOR_MASK (0x7f << EDID_TIMING_3_VENDOR_SHIFT)
295#define EDID_TIMING_3_1152x870_75Hz (1 << 7)
299#define ASPECT_RATIO_16_10 0
300#define ASPECT_RATIO_4_3 1
301#define ASPECT_RATIO_5_4 2
302#define ASPECT_RATIO_16_9 3
304#define EDID_STDTIMING_XRES_OFFSET (0)
305# define EDID_STDTIMING_ASPECT_SHIFT (6)
306# define EDID_STDTIMING_ASPECT_MASK (3 << EDID_STDTIMING_ASPECT_SHIFT)
307# define EDID_STDTIMING_ASPECT_16_10 (ASPECT_RATIO_16_10 << EDID_STDTIMING_ASPECT_SHIFT)
308# define EDID_STDTIMING_ASPECT_4_3 (ASPECT_RATIO_4_3 << EDID_STDTIMING_ASPECT_SHIFT)
309# define EDID_STDTIMING_ASPECT_5_4 (ASPECT_RATIO_5_4 << EDID_STDTIMING_ASPECT_SHIFT)
310# define EDID_STDTIMING_ASPECT_16_9 (ASPECT_RATIO_16_9 << EDID_STDTIMING_ASPECT_SHIFT)
311# define EDID_STDTIMING_VFREQ_SHIFT (0)
312# define EDID_STDTIMING_VFREQ_MASK (0x3f << EDID_STDTIMING_VFREQ_SHIFT)
314#define EDID_STDTIMING_INFO_OFFSET (1)
318#define EDID_STEROMODE_FIELDSEQ_RIGHT 1
319#define EDID_STEROMODE_FIELDSEQ_LEFT 2
320#define EDID_STEROMODE_4WAY_INTERLEAVED 3
322#define EDID_STEROMODE_RIGHT 1
323#define EDID_STEROMODE_LEFT 2
324#define EDID_STEROMODE_SIDEBYSIDE 3
326#define EDID_DESC_PIXCLOCK_OFFSET 0
327#define EDID_DESC_HPIXELS_LSBITS_OFFSET 2
328#define EDID_DESC_HBLANK_LSBITS_OFFSET 3
329#define EDID_DESC_HMSBITS_OFFSET 4
330# define EDID_DESC_HBLANK_MSBITS_SHIFT (0)
331# define EDID_DESC_HBLANK_MSBITS_MASK (15 << EDID_DESC_HBLANK_MSBITS_SHIFT)
332# define EDID_DESC_HPIXELS_MSBITS_SHIFT (4)
333# define EDID_DESC_HPIXELS_MSBITS_MASK (15 << EDID_DESC_HPIXELS_MSBITS_SHIFT)
334#define EDID_DESC_VLINES_LSBITS_OFFSET 5
335#define EDID_DESC_VBLANK_LSBITS_OFFSET 6
336#define EDID_DESC_VMSBITS_OFFSET 7
337# define EDID_DESC_VBLANK_MSBITS_SHIFT (0)
338# define EDID_DESC_VBLANK_MSBITS_MASK (15 << EDID_DESC_VBLANK_MSBITS_SHIFT)
339# define EDID_DESC_VLINES_MSBITS_SHIFT (4)
340# define EDID_DESC_VLINES_MSBITS_MASK (15 << EDID_DESC_VLINES_MSBITS_SHIFT)
341#define EDID_DESC_HPORCH_LSBITS_OFFSET 8
342#define EDID_DESC_HPW_LSBITS_OFFSET 9
343#define EDID_DESC_VPORCH_LSBITS_OFFSET 10
344# define EDID_DESC_VPW_LSBITS_SHIFT (0)
345# define EDID_DESC_VPW_LSBITS_MASK (15 << EDID_DESC_VPW_LSBITS_SHIFT)
346# define EDID_DESC_VPORCH_LSBITS_SHIFT (4)
347# define EDID_DESC_VPORCH_LSBITS_MASK (15 << EDID_DESC_VPORCH_LSBITS_SHIFT)
348#define EDID_DESC_PORCH_MSBITS_OFFSET 11
349# define EDID_DESC_VPW_MSBITS_SHIFT (0)
350# define EDID_DESC_VPW_MSBITS_MASK (3 << EDID_DESC_VPW_MSBITS_SHIFT)
351# define EDID_DESC_VPORCH_MSBITS_SHIFT (2)
352# define EDID_DESC_VPORCH_MSBITS_MASK (3 << EDID_DESC_VPORCH_MSBITS_SHIFT)
353# define EDID_DESC_HPW_MSBITS_SHIFT (4)
354# define EDID_DESC_HPW_MSBITS_MASK (3 << EDID_DESC_HPW_MSBITS_SHIFT)
355# define EDID_DESC_HPORCH_MSBITS_SHIFT (6)
356# define EDID_DESC_HPORCH_MSBITS_MASK (3 << EDID_DESC_HPORCH_MSBITS_SHIFT)
357#define EDID_DESC_HSIZE_LSBITS_OFFSET 12
358#define EDID_DESC_VSIZE_LSBITS_OFFSET 13
359#define EDID_DESC_SIZE_MSBITS_OFFSET 14
360# define EDID_DESC_VSIZE_MSBITS_SHIFT (0)
361# define EDID_DESC_VSIZE_MSBITS_MASK (15 << EDID_DESC_VSIZE_MSBITS_SHIFT)
362# define EDID_DESC_HSIZE_MSBITS_SHIFT (4)
363# define EDID_DESC_HSIZE_MSBITS_MASK (15 << EDID_DESC_HSIZE_MSBITS_SHIFT)
364#define EDID_DESC_HBORDER_OFFSET 15
365#define EDID_DESC_VBORDER_OFFSET 16
366#define EDID_DESC_FEATURES_OFFSET 17
368# define EDID_DESC_STEREO_INTERLEAVE (1 << 0)
371# define EDID_DESC_ANALOG_SYNCALL (1 << 1)
372# define EDID_DESC_ANALOG_VSERRATION (1 << 2)
373# define EDID_DESC_ANALOG_SYNCTYPE (1 << 3)
375# define EDID DESC_DIGITAL_VPOLARITY (1 << 2)
377# define EDID_DESC_DIGITAL_HPOLARITY (1 << 1)
378# define EDID_DESC_DIGITAL_VSERRATION (1 << 2)
379# define EDID_DESC_DIGITAL_SYNCTYPE (1 << 3)
380# define EDID_DESC_DIGITAL_SYNC (1 << 4)
381# define EDID_DESC_STEREO_SHIFT (5)
382# define EDID_DESC_STEREO_MASK (3 << EDID_DESC_STEREO_SHIFT)
383# define EDID_DESC_INTERLACED (1 << 7)
387#define _VACT_LO(p) ((p)[EDID_DESC_VLINES_LSBITS_OFFSET])
388#define _VBLK_LO(p) ((p)[EDID_DESC_VBLANK_LSBITS_OFFSET])
389#define _VACT_HI(p) (((p)[EDID_DESC_VMSBITS_OFFSET] & EDID_DESC_VLINES_MSBITS_MASK) << 4)
390#define _VBLK_HI(p) (((p)[EDID_DESC_VMSBITS_OFFSET] & EDID_DESC_VBLANK_MSBITS_MASK) << 8)
391#define EDID_DESC_VACTIVE(p) (_VACT_LO(p) | _VACT_HI(p))
392#define EDID_DESC_VBLANK(p) (_VBLK_LO(p) | _VBLK_HI(p))
394#define _HACT_LO(p) ((p)[EDID_DESC_HPIXELS_LSBITS_OFFSET])
395#define _HBLK_LO(p) ((p)[EDID_DESC_HBLANK_LSBITS_OFFSET])
396#define _HACT_HI(p) (((p)[EDID_DESC_HMSBITS_OFFSET] & EDID_DESC_HPIXELS_MSBITS_SHIFT) << 4)
397#define _HBLK_HI(p) (((p)[EDID_DESC_HMSBITS_OFFSET] & EDID_DESC_HBLANK_MSBITS_SHIFT) << 8)
398#define EDID_DESC_HACTIVE(p) (_HACT_LO(p) | _HACT_HI(p))
399#define EDID_DESC_HBLANK(p) (_HBLK_LO(p) | _HBLK_HI(p))
401#define _HOFF_LO(p) ((p)[EDID_DESC_HPORCH_LSBITS_OFFSET])
402#define _HWID_LO(p) ((p)[EDID_DESC_HPW_LSBITS_OFFSET])
403#define _VOFF_LO(p) ((p)[EDID_DESC_VPORCH_LSBITS_OFFSET] >> EDID_DESC_VPORCH_LSBITS_SHIFT)
404#define _VWID_LO(p) ((p)[EDID_DESC_VPORCH_LSBITS_OFFSET] & EDID_DESC_VPW_LSBITS_MASK)
405#define _HOFF_HI(p) (((p)[EDID_DESC_PORCH_MSBITS_OFFSET] & EDID_DESC_HPORCH_MSBITS_MASK) << 2)
406#define _HWID_HI(p) (((p)[EDID_DESC_PORCH_MSBITS_OFFSET] & EDID_DESC_HPW_MSBITS_MASK) << 4)
407#define _VOFF_HI(p) (((p)[EDID_DESC_PORCH_MSBITS_OFFSET] & EDID_DESC_VPORCH_MSBITS_MASK) << 2)
408#define _VWID_HI(p) (((p)[EDID_DESC_PORCH_MSBITS_OFFSET] & EDID_DESC_VPW_MSBITS_MASK) << 4)
409#define EDID_DESC_HSYNC_OFFSET(p) (_HOFF_LO(p) | _HOFF_HI(p))
410#define EDID_DESC_HSYNC_WIDTH(p) (_HWID_LO(p) | _HWID_HI(p))
411#define EDID_DESC_VSYNC_OFFSET(p) (_VOFF_LO(p) | _VOFF_HI(p))
412#define EDID_DESC_VSYNC_WIDTH(p) (_VWID_LO(p) | _VWID_HI(p))
414#define _HSZ_LO(p) ((p)[EDID_DESC_HSIZE_LSBITS_OFFSET])
415#define _VSZ_LO(p) ((p)[EDID_DESC_VSIZE_LSBITS_OFFSET])
416#define _HSZ_HI(p) (((p)[EDID_DESC_SIZE_MSBITS_OFFSET] & EDID_DESC_HSIZE_MSBITS_MASK) << 4)
417#define _VSZ_HI(p) (((p)[EDID_DESC_SIZE_MSBITS_OFFSET] & EDID_DESC_VSIZE_MSBITS_MASK) << 8)
418#define EDID_DESC_HSIZE(p) (_HSZ_LO(p) | _HSZ_HI(p))
419#define EDID_DESC_VSIZE(p) (_VSZ_LO(p) | _VSZ_HI(p))
423#define EDID_DESC_ZERO_1 0
424#define EDID_DESC_ZERO_2 2
425#define EDID_DESC_DESCTYPE 3
426#define EDID_DESC_ZERO_3 4
427#define EDID_DESC_INFO 5
431#define EDID_DESCTYPE_DUMMY 0x10
432#define EDID_DESCTYPE_STDTIMING 0xf7
433#define EDID_DESCTYPE_CVT 0xf8
434#define EDID_DESCTYPE_DCM 0xf9
435#define EDID_DESCTYPE_STDTIMING_ID 0xfa
436#define EDID_DESCTYPE_WHITEPOINT 0xfb
437#define EDID_DESCTYPE_NAME 0xfc
438#define EDID_DESCTYPE_LIMITS 0xfd
439#define EDID_DESCTYPE_TEXT 0xfe
440#define EDID_DESCTYPE_SERIALNO 0xff
444#define EDID_DESC_ASCII_DATA_OFFSET 5
445#define EDID_DESC_ASCII_DATA_LEN 13
447#define EDID_DESC_RANGE_MIN_VFREQ(p) ((p)[5])
448#define EDID_DESC_RANGE_MAX_VFREQ(p) ((p)[6])
449#define EDID_DESC_RANGE_MIN_HFREQ(p) ((p)[7])
450#define EDID_DESC_RANGE_MAX_HFREQ(p) ((p)[8])
451#define EDID_DESC_RANGE_MAX_CLOCK(p) (((p)[9]) * 10)
452#define EDID_DESC_RANGE_HAVE_GTF2(p) (((p)[10]) == 0x02)
453#define EDID_DESC_RANGE_GTF2_HFREQ(p) (((p)[12]) * 2)
454#define EDID_DESC_RANGE_GTF2_C(p) (((p)[13]) / 2)
455#define EDID_DESC_RANGE_GTF2_M(p) ((p)[14] + ((p)[15] << 8))
456#define EDID_DESC_RANGE_GTF2_K(p) ((p)[16])
457#define EDID_DESC_RANGE_GTF2_J(p) ((p)[17] / 2)
459#define EDID_DESC_COLOR_WHITEX(p)
460#define EDID_DESC_COLOR_WHITE_INDEX_1(p) ((p)[5])
461#define EDID_DESC_COLOR_WHITEX_1(p) _CHROMA(p, 6, 2, 7)
462#define EDID_DESC_COLOR_WHITEY_1(p) _CHROMA(p, 6, 0, 8)
463#define EDID_DESC_COLOR_GAMMA_1(p) _GAMMA(p[9])
464#define EDID_DESC_COLOR_WHITE_INDEX_2(p) ((p)[10])
465#define EDID_DESC_COLOR_WHITEX_2(p) _CHROMA(p, 11, 2, 12)
466#define EDID_DESC_COLOR_WHITEY_2(p) _CHROMA(p, 11, 0, 13)
467#define EDID_DESC_COLOR_GAMMA_2(p) _GAMMA(p[14])
469#define EDID_DESC_STD_TIMING_START_OFFSET 5
470#define EDID_DESC_STD_TIMING_COUNT_OFFSET 6
478#define EDID_EXT_TIMING 0x00
479#define EDID_EXT_CEA 0x02
480#define EDID_EXT_VTBEXT 0x10
481#define EDID_EXT_V2p0 0x20
482#define EDID_EXT_DIEXT 0x40
483#define EDID_EXT_LSEXT 0x50
484#define EDID_EXT_MIEXT 0x60
485#define EDID_EXT_DIDEXIT 0x70
486#define EDID_EXT_DTCDB_1 0xa7
487#define EDID_EXT_DTCDB_2 0xaf
488#define EDID_EXT_DTCDB_3 0xbf
489#define EDID_EXT_BLOCKMAP 0xf0
490#define EDID_EXT_DDDB 0xff
491#define EDID_EXT_VENDOR 0xff
516 uint16_t er_min_vfreq;
517 uint16_t er_max_vfreq;
518 uint16_t er_min_hfreq;
519 uint16_t er_max_hfreq;
520 uint16_t er_max_clock;
521 uint16_t er_gtf2_hfreq;
532 uint8_t edid_manufacturer[4];
533 uint8_t edid_version;
534 uint8_t edid_revision;
535 uint8_t edid_video_input;
536 uint8_t edid_max_hsize;
537 uint8_t edid_max_vsize;
539 uint8_t edid_features;
540 uint8_t edid_ext_block_count;
541 uint16_t edid_product;
542 uint32_t edid_serial;
545 bool edid_have_range;
578int edid_parse(FAR
const uint8_t *data, FAR
struct edid_info_s *edid);
Definition: videomode.h:84