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Spresense SDK Library v3.2.0-ebc0364
chip.h
1/****************************************************************************
2 * arch/arm/include/cxd56xx/chip.h
3 *
4 * Licensed to the Apache Software Foundation (ASF) under one or more
5 * contributor license agreements. See the NOTICE file distributed with
6 * this work for additional information regarding copyright ownership. The
7 * ASF licenses this file to you under the Apache License, Version 2.0 (the
8 * "License"); you may not use this file except in compliance with the
9 * License. You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
15 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
16 * License for the specific language governing permissions and limitations
17 * under the License.
18 *
19 ****************************************************************************/
20
21#ifndef __ARCH_ARM_INCLUDE_CXD56XX_CHIP_H
22#define __ARCH_ARM_INCLUDE_CXD56XX_CHIP_H
23
24/****************************************************************************
25 * Pre-processor Prototypes
26 ****************************************************************************/
27
28/* physical address conversion macro */
29
30#define CXD56_PHYSADDR(a) ((uint32_t)((uint32_t)(a) & 0x9ffffffful))
31
32#define CXD56M4_SYSH_PRIORITY_MIN 0xe0 /* All bits[7:5] set is minimum priority */
33#define CXD56M4_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
34#define CXD56M4_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
35#define CXD56M4_SYSH_PRIORITY_STEP 0x20 /* Steps between priorities */
36
37#define NVIC_SYSH_PRIORITY_MIN CXD56M4_SYSH_PRIORITY_MIN
38#define NVIC_SYSH_PRIORITY_DEFAULT CXD56M4_SYSH_PRIORITY_DEFAULT
39#define NVIC_SYSH_PRIORITY_MAX CXD56M4_SYSH_PRIORITY_MAX
40#define NVIC_SYSH_PRIORITY_STEP CXD56M4_SYSH_PRIORITY_STEP
41
42#endif /* __ARCH_ARM_INCLUDE_CXD56XX_CHIP_H */